8x8 Bitmap Image Compressions on FPGA

Chiang, Choon Yong (2015) 8x8 Bitmap Image Compressions on FPGA. Final Year Project (Bachelor), Tunku Abdul Rahman University College.

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Abstract

This work is to implement the cosine transform and compression algorithm for 8 by 8 of single byte data block on FPGA board. By completing this work, it should resolve the problem of slower operation from implementation of compression algorithm with computer language like C programming which executes commands line by line. This is because the algorithms itself keep repeating same process to produce a lot of outputs which cause time consumed heavily. However, the outputs from same process are independently on each other. Therefore, process on algorithm can build on FPGA hardware and run as parallel by building multiple same modules for one process. Hence, it able to compute the output results in short time. However, it required a lot of resources to support operation that heavily in math computation. Here are the few steps to achieve the aim of this project. First, the representation for negative and positive number in decimal base including floating value must be determined. This can be tested by displaying value on 7 segment LEDs that available on FPGA board. Next test will be on arithmetic operation on binary values so that size of result can be determined without overflow and make sure the result is same as expected. By studying the equation on literature research for compression algorithm, the process for algorithm are split into different state diagram and test it with random data set. The output result should be the same or nearer to the output result that computed using computer software tool. To display 64 data on limited 7 segment LEDs, the only way to test is to using switch as row and column selector and pick the data going to display only. The program should be run faster because each operation run in clock cycle with period of 1/50MHz = 20 Nano seconds. In this project, this compression algorithm ready to receive 64 input data from SD card then return it back after compression and decompression. The board used in this project is Altera DE1-SoC.